In a conventional Direct Digital Synthesizer (“DDS”), there is a phase accumulator (“accumulator”) and a sine/cosine lookup table (“lookup table”). Phase accumulation is conventionally implemented modulus 2^N, where N is a width of the accumulator. Because the range 0 to 2^N−1 describes a full circle of phase, simply discarding carry-out information performs a modulus 2^N operation and maps phase angles above 360 degrees back into the range of 0 to 360 degrees.
A conventional DDS may be an N-bit device, where N is large. For example, N may be 48 bits. A large value for N is used to provide precise frequency resolution. However, generally only most significant bits (“MSBs”) of the output of such a DDS may be passed to a lookup table, such as in a non-rasterizing DDS for example. By using only the MSBs, and thus truncating the least significant bits (“LSBs”), address size is reduced. In other words, the amount of random access memory (“RAM”) may be reduced to control cost.
However, phase noise generate by such truncation can be problematic. Along those lines, to remove such phase noise, exact phase values may be applied to such a lookup table. Unfortunately, heretofore, this meant that either multiple layers of logic were used in an accumulator feedback path or, for an accumulator feedback path to have a latency of greater than one, multiple channels were interlaced.
Accordingly, it would be useful to provide a phase accumulator that overcomes one or more the above-described limitations.